Silicon has been the dominant material for electronic computing for decades, but it is well-known that Moore’s law is long dead. Therefore, a fervent search for (i) new semiconductors that could directly replace silicon or (ii) new architectures with novel materials/devices added onto silicon or (iii) new physics/state-variables or a combination of above has been the subject of much of the electronic materials and devices research of the past 2 decades. This is not possible without fundamental innovation in new electronic materials and devices. Therefore, I will make the case that novel layered two-dimensional (2D) chalcogenide materials and three-dimensional (3D) nitride materials might present interesting avenues to overcome some of the limitations being faced by Silicon hardware. I will present our work on integration of 2D chalcogenide semiconductors with Silicon to realize low-power tunnelling field effect transistors. In particular I will focus on In-Se based 2D semiconductors for this application and extend discussion on them to phase-pure, epitaxial thin-film growth over wafer scales, at temperatures low-enough to be compatible with back end of line (BEOL) processing in Silicon fabs. I will then discuss memory devices from 2D materials when integrated with emerging wurtzite structure ferroelectric nitride materials namely aluminium scandium nitride (AlScN). First, I will present on Ferroelectric Field Effect Transistors (FEFETs) made from 2D materials when integrated with AlScN and make the case for 2D semiconductors in this application. Next I will introduce our work on Ferroelectric Diode (FeD) devices also based on thin AlScN. I will also present how FeDs provide a unique advantage in compute-in-memory (CIM) architectures for efficient storage, search and hardware implementation of neural networks. Finally, I will present ongoing work and opportunities to extend the application of AlScN ferrodiodes into extreme environments, scaling them and integration with SiC electronics. I will end the talk with a broad perspective on the role of novel materials and heterostructures in semiconductor technologies for electronic computing. Co-sponsored by: IEEE North Jersey Section Speaker(s): , Dr. Deep Jariwala Agenda: Event Time: 2:30 PM to 4:00 PM 2:00 PM Refreshments and Networking 2:15 PM Talk by Dr. Deep Jariwala of U Penn Seminar is in Central King Building, Room 116. All Welcome: There is no fee/charge for attending IEEE technical seminar. You don’t have to be an IEEE Member to attend. Refreshments are free for all attendees. Please invite your friends and colleagues to take advantage of this Invited Distinguished Lecture. Room: 116, Bldg: Central King Building, 154 Summit Street, Newark, NJ 07102, NJIT, Newark, New Jersey, United States, 07102