This In-Person Life Grade Luncheon is scheduled for October 27. The topic of this year’s meeting is: Towards the 100% Clean Energy Future- Opportunities and challenges related to the 100 % clean energy system- Distributed energy resources (DERs) widespread- Role of smart inverters and fast electronics to regulate the voltage- Mother Nature grid challenges- The smarter grid & emerging technologies role- Inertia challenges- Role of data, big data, Machine Learning and Artificial Intelligence-Co-sponsored by: PES - Ron Quade and IAS - Ken OexleSpeaker(s): Mousa, Ahmed, Agenda: - Opportunities and challenges related to the 100 % clean energy system- Distributed energy resources (DERs) widespread- Role of smart inverters and fast electronics to regulate the voltage- Mother Nature grid challenges- The smarter grid & emerging technologies role- Inertia challenges- Role of data, big data, Machine Learning and Artificial IntelligenceAll members in "good standing" (good standing refers to active Life members who have paid their IEEE dues for calendar year 2022) of the North New Jersey Section Life Member Affinity Group are eligible to attend plus invited guests.Bldg: Hanover Manor, 16 Eagle Rock Avenue, East Hanover, New Jersey, United States, 07936

-5G changes how we communicate and fuels digital transformation across different industries and vertical markets. True 5G devices strike a balance between having the right feature set and market readiness, ultimately creating value for the end customer.In this webinar, the following will be discussed:- Types of 5G devices, markets, and use cases: eMBB, IIoT/RedCap, Fixed Wireless Access, NTN- Design challenges for the different 5G device markets and use case- 5G device test strategy to speed up the design- Please click the link for registration for attending the webinar: (https://smc-link.s4hana.ondemand.com/eu/data-buffer/sap/public/cuan/link/100/11BD83CEA3BF718727FF51835AF15B632D45E0ED?_V_=2&_K11_=9F8ED169ABB633060368BBA381BCF565B5EDE0E5&_L54AD1F204_=c2NlbmFyaW89TUxDUEcmdGVuYW50PW15MzAyMDM5LnM0aGFuYS5vbmRlbWFuZC5jb20mdGFyZ2V0PWh0dHBzOi8vZXZlbnQub24yNC5jb20vd2NjL3IvMzkyMzMxMS9EQ0YwRkUxMjlDMERCRUZEQzFDMDBGODUxMkZDMjIwQi80MDk1MzY2P3BhcnRuZXJyZWY9bmFfbTRjX1JldGhpbms1R1Rlc3Rpbmc&_K13_=398&_K14_=e429508c4235a621f38b5f6403271c5c21f5d5b6cf1cb16d3c02dd0cd10eeb75)Co-sponsored by: IEEE North Jersey SectionSpeaker(s): Tim Seyler, Agenda: - Please click the link for registration for attending the webinar: (https://smc-link.s4hana.ondemand.com/eu/data-buffer/sap/public/cuan/link/100/11BD83CEA3BF718727FF51835AF15B632D45E0ED?_V_=2&_K11_=9F8ED169ABB633060368BBA381BCF565B5EDE0E5&_L54AD1F204_=c2NlbmFyaW89TUxDUEcmdGVuYW50PW15MzAyMDM5LnM0aGFuYS5vbmRlbWFuZC5jb20mdGFyZ2V0PWh0dHBzOi8vZXZlbnQub24yNC5jb20vd2NjL3IvMzkyMzMxMS9EQ0YwRkUxMjlDMERCRUZEQzFDMDBGODUxMkZDMjIwQi80MDk1MzY2P3BhcnRuZXJyZWY9bmFfbTRjX1JldGhpbms1R1Rlc3Rpbmc&_K13_=398&_K14_=e429508c4235a621f38b5f6403271c5c21f5d5b6cf1cb16d3c02dd0cd10eeb75)Virtual: https://events.vtools.ieee.org/m/325455

On Thursday, October 27, 2022, the (https://www.technologyontap.org/) will host a presentation on Open Source Chip Design with Dr Mehdi Saligane on Zoom.About the TopicLowering the barriers to chip design using OpenFASOC: Fully Autonomous System-on-Chip (FASoC) tool is a DARPA-funded project within the IDEA program. Its main objective is to address the need for analog compilers. The framework relies on the place and route digital flow which has long been extensively automated while most analog flows are still extremely reliant on manual design. This lack of analog automation tools leads to long design cycles and costs. FASoC addresses this need and uses a cell-based analog design generation methodology to generate different analog and mixed-signal (AMS) blocks (i.e., PLL, LDO, DC-DC converters, Temperature Sensors, etc.).A few SoCs have been taped out in the SkyWater 130 nm, BI-CMOS 130 nm, TSMC 65 nm and Globalfoundries 12 nm foundry process nodes. OpenFASOC has been built on top of OpenROAD for push-button layout generation as part of the current open source effort. This talk will go through a few of our open-source analog generators (Temperature Sensor, Switched-Cap DC-DC Converter, etc.), our implemented designs in Google’s free shuttles MPW-I / II and our GF12LP tapeout of the OpenTitan SoC which heavily used open source tooling.About the Speaker(https://www.linkedin.com/in/mehdi-saligane/) is a Research Scientist in the Department of Electrical Engineering and Computer Science at the University of Michigan. He received his Masters, and Ph.D. degrees in electrical and computer engineering from the University of Grenoble and Aix-Marseille in 2011 and 2016, respectively. He worked at STMicroelectronics, in France, as a Research Engineer from 2010 to 2015, and after completing his Ph.D., he joined the (https://micl.engin.umich.edu/) at the University of Michigan. Dr. Saligane’s current research interests are in low-power and energy-efficient IC design with a recent focus on open-source EDA and analog and mixed-signal IC design automation. He currently serves as chair of the Analog Working Group and, as a member of the Technical Steering Committee at (https://chipsalliance.org/), and as a technical member of SSCS’ open source ecosystem.CNNNJ Invites You to Join the NetworkFounded in 1992, the IEEE Consultants Network of Northern NJ (CNNNJ) encourages and promotes the use of independent technical consultants by business and industry. The CNNNJ invites all engineers engaged in independent practice to join its ranks. For more details on member benefits and admission requirements, please visit our website at technologyontap.org.Agenda: IntroductionsSpeaker presentationDemoAudience questions welcomedNetworkingVirtual: https://events.vtools.ieee.org/m/328096